Thursday 26 January 2017

VLSI Design and implementation of Built in Self Test




VLSI Design and implementation of Built in Self Test 

MODULE 1: Design of Test Pattern Generator (TPG)
DESCRIPTION:
          The  test pattern generation is the basic module for Analog built-in self-test(BIST).In the proposed system a Built in self test is performed using a sample module which is nothing but a random access memory(RAM) is designed. The BIST RAM is considered under test and difference advanced test cases are given to test the circuit. We are using the test pattern generator for applying the proper test cases to the BIST RAM. 

MODULE 2:  Design of control unit
DESCRIPTION:
          This module is implemented for controlling the overall operations in the RAM built-in self-test. The control unit makes the control over the writing, reading, addressing and comparison etc. in the built-in self-test. Moreover the control unit will take the decision about the process in the BIST.In this way improves the efficiency.

MODULE 3: Design of Test Pattern Recorder (TPR)
DESCRIPTION:
               In the RAM built-in self-test, the input data to be stored in the RAM memory locations. The comparator in the BIST (built-in self-test) system take the data from the RAM module and also directly from the input with the help of BIST controller. After the comparison we get the output with respect to the inputs of comparator and test the BIST RAM under the different advanced test cases. The performance is measure in such a way the power consumption reduction, Area efficiency is achieved.


MODULE 4: Design and analysis of Integration module

DESCRIPTION:

                   We are integrating all the sub modules and output signals are routed into the required ports as per the FPGA device.

No comments:

Post a Comment

GREETINGS