Audio Noise Cancellation System in Ear Phones :
To generate a noise Signal under test
For testing purpose initially we generate the noise added test signal
Then the signal undergoes threshold process
LMS Filter is applied
The resultant signal consist of Noise tolerant pure audio signal
Block diagram
PROPOSED DESIGN
In
the proposed system, we are planning to implement parallel architecture for
adaptive LMS filter configuration, a concurrently processed filter which adapts
the time controlled single blocks is realized here. Designing the analog filter
in a digital manner required lots of storage and considerations, where the
filter co-efficients are negotiated here which are uploaded in to the look up
table. These data are further configured and get back from the stored buffers.
Here only the single block is designed hence, depends upon the timing control
these blocks are called like a function. This design architecture reduces the
area utilized and reduces the Power too.
Advantages
- High speed configurable parallel architecture
- Low power architecture
- Area utilization is reduced
Software requirements:
- Design Environment: XILINX ISE
- Language: VHDL
- Simulation: MODELSIM / XILINX ISE Simulator
Hardware requirements:
- XILINX SPARTAN Development Board, CPLD
- Device: XC3S500E / XC9572XL / XILINX SPARTAN 3AN
- SIMULATION RESULTS
