FIR FILTER implementation with Distributed Arithmetic Concept
We implemented successfully and finaly got the data flow results for the same.
Just go through it.
Module Descriptions are below
We implemented successfully and finaly got the data flow results for the same.
Just go through it.
Module Descriptions are below
Module
Description
Design of Signal Shaping Circuit
Design
of Signal Shaping Circuit is used to generate the analog informative signal by
converting them in to discrete slots of waves. A Counter circuit connected with
a LUT stores the required signal parameter informations which is operated with
respect to system clock
Design of Configurable DA Algorithm
Distributed
arithmetic is based on the function Fj which takes 2N different
values. For all input, values are pre-computed earlier and stored in a look-up
table. Bit j of each data xij is used to address look-up table.
Eq. shows that three different operations are required for calculation of the
inner product.. Distributed arithmetic computations are bit-serial in nature,
in which, each bit of the input samples are indexed in turn before a new output
sample becomes available in next clock cycle. The input is represented with B
bits which is used to calculate inner-product within LUT.
Design of FIR FILTER blocks
This
module consists of FIR filter blocks which enable the MCM concept using
distributed arithmetic algorithm, here we use clock gating and power gated
methods of architecture implementation to efficiently integrate the distributed
arithmetic encapsulated FIR concept
Integration Module
This
module is used to integrate all the sub modules associated with the main
program such as signal shaper, parallel filter module, Digital analyser etc
Outputs
Simulation Results
