Monday 4 September 2017

phd projects in chennai :Design and implementation of auto-tunable index for memory mapping in FPGA Devices using MEMRISTOR



Design and implementation of auto-tunable index for memory mapping in FPGA Devices using MEMRISTOR

Module Description
Module 1: Design of Memory under Test (MUT)
This module consists of digital memory unit which contains all the memory operations such as memory read, memory write, memory store and chip selection. Read clock and write clocks are generated in the same module itself

Module 2: Design of Auto-Tunable index Control
This module consists of configurable tuning inputs to control the memory index operations, these inputs are generated automatically using the clock controlled counter. Also consists of control signals and reference signals to control the major operations internally, all the internal signals also displayed in to the simulation window

Module3: Design of Memristors control
This module shows how the memristors works and the memristance is generated. Auto mode and manual mode are the optional things given for tuning. The tuning resolution can be varied at any time by simple code modifications.

Module 4: Integration
This module is used to integrate the sub systems with the main module


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