VLSI Projects in chennai - Contact 8939504005: March 2018

Tuesday 27 March 2018

FPGA based Live image background subtraction

Image Processing In FPGA

FPGA Plays a major role in high speed communication. Image processing becomes vital in any kind of mobile applications. Fault finding, Survelliance, Medical imaging are the applications involves Image processing

Background subtraction process is used to isolate the particular blob of interested region from the real wold camera capture. the purpose of blob seperation is to analyse the roi region movements and tracking and behavioral analysis etc

FPGA based system is realized here to focus on operating speed, resolution area more accurately the digital block process always helpful. Design of Digital filter in FPGA help to clear the noise present in the image
Module Description

PRE PROCESSING
Image preprocessing in MATLAB. Get the image live capture through webCam and initialize the pixel resize work. the array of Pixel values are further processed to RGB to gray conversion.

SERIAL Configuration
The converted Pixel info is transfered through UART Communication.The serially transmitted bits are read in FPGA

BackGround Subtraction
In VLSI Design,The Clock gated logic is developed to hold the each pixel values at rising edge of the clock and subtract with the constant Background value.

An VLSI & MATLAB Fusion work i done here.Related info and diagrams are shown below. contact us for further doubts & clarifications

VLSI SIMULATION

DATA FLOW DIAGRAM

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Saturday 10 March 2018

pwm generation for stepper motor control using FPGA

PWM Generation using FPGA for stepper motor Control

FPGA based stepper motor tuning is developed here. PWM signals are used to tune the rotar and stator of the stepper motor, the duration of pulse determine the tuning step for the motor.

A real time FPGA based system is implemented here in which the PWM signals are generated using the global clock considered here 1 MHZ.

A 8 ms pulse is generated followed by 16ms , 32ms, and 64 ms too.

The design is configurable in a way in which the speed and step size can be varied by the user.

The step size is tunable by an interger value in simulation and Digital sequence of Binary bits assigned as 4 bit Switch in hardware

The speed of the clock also tunable using 2 Bit Switch

Low power clock gated flip flops are used for this design henceforth the design consumes less chip power.

Simulation Result is shown below

Stepper motor Control using FPGA

Architecture Module diagram

Monday 5 March 2018

GPS based navigation and Audio Commands for Visually Challenged peoples

GPS based navigation and Audio Commands for Visually Challenged peoples

This is one of the interesting idea helpful for visually challenged peoples on navigating them towards correct route. MATLAB tool is used here to get the voice commands and convert them into navigating voice command through MEL Frequency algorithm.

GPS Module is used here to get the location information and an integrated PIC Micro controller is used here to communicate the gps info to MATLAB environment through UART communication. Serial port is configured in such a way it get the location info through GPS also voice command from the person and get the exact required info from the database and proceed the navigation voice commands which is prestored.

The system is locally designed now as a future implementation it can be globalized through IOT platform for real time navigation.

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