VLSI Projects in chennai - Contact 8939504005: 2018

Wednesday, 17 October 2018

FIR Filter Design with Configurable LUT using 4:2 Compressor and 7:2 Compressor

Design of FIR FILTER with Configurable LUT using 4:2 Compressor and 7:2 Compressor

FIR filters are applications which require many multiply-and-accumulate operations which consume more space. The good digital design consists of reduced multipliers, to reduce the FPGA Accumulation cost.To achieve this kind of circuits we need to create circuits with reduced multipliers or multiplierless Distribute arithmetic concepts.

The Distributed arithmetic FIR filter can be classified as two types: the first type stores the coefficients in look-up tables (LUTs).the second part adds the outputs of these LUTs and calculates the final FIR filter output using an adder tree.

These kind of filters have a very compact structure and can be efficiently mapped to LUT-based FPGAs, . Furthermore, DA method is very much suitable for reconfigurable designs, where the coefficients are available to be changed during run time.

Despite the fact that the storage space grows increasingly with filter taps, this issue can be solved by replacing a large LUT with several small LUTs Few research analyzed the optimal input bit width of these small LUTs on Xilinx FPGAs and proved that a better implementation can be achieved when the input bit width is close to the number of LUT inputs in FPGAs

The proposed method comprises of 4:2 Compression and 7:2 Compression using reconfigurable LUTS where the FIR Coefficients can be varied at run time.The design can be extended further too depends upon the required application.

Simulation Results

VIDEO OUTPUT

FIR FILTER using 4:2 and 7:2 ompressor

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Friday, 14 September 2018

MATLAB-VLSI Project :Detection of Finger vein

Detection of Finger vein structure through MIURA Max-curve algorithm with improved accuracy

Aim

To design a MATLAB simulated model for Detection of Finger vein structure through Max-curve algorithm with improved accuracy

Abstract

Finger vein recognition is a method of biometric authentication that uses pattern-recognition techniques based on images of human finger vein patterns beneath the skin's surface. Finger vein recognition is one of many forms of biometrics used to identify individuals and verify their identity.Finger Vein ID is a biometric authentication system that matches the vascular pattern in an individual's finger to previously obtained data. Hitachi developed and patented a finger vein ID system.In the existing design a matlab model is developed using tri branch function to detect and analyze the finger veins.In the proposed system a accurate detection of MIURA max-curve algorithm is developed for the detection of finger vein branches. This method vary the threshold comparisons dynamically henceforth enabling the system to detect various similar output of the finger veins for better comparison. This method will try to extract the centre lines of the veins. This is done by calculating local maximum curvatures in cross-sectional profiles of a vein image. The method is supposed to be robust against varying vein widths and non-uniform brightness. Repeated line tracking,This algorithm will start at several random points and will try to track a line. If a pixel has been visited by the line tracking algorithm multiple times it is likely to be a vein

Existing System

In the existing design a matlab model is developed using tri branch function to detect and analyze the finger veins. Finger vein recognition is a method of biometric authentication that uses pattern-recognition techniques based on images of human finger vein patterns beneath the skin's surface. Finger vein recognition is one of many forms of biometrics used to identify individuals and verify their identity.Finger Vein ID is a biometric authentication system that matches the vascular pattern in an individual's finger to previously obtained data. Hitachi developed and patented a finger vein ID system

Proposed System

In the proposed system a accurate detection of MIURA max-curve algorithm is developed for the detection of finger vein branches. This method vary the threshold comparisons dynamically henceforth enabling the system to detect various similar output of the finger veins for better comparison. This method will try to extract the centre lines of the veins. This is done by calculating local maximum curvatures in cross-sectional profiles of a vein image. The method is supposed to be robust against varying vein widths and non-uniform brightness. Repeated line tracking,This algorithm will start at several random points and will try to track a line. If a pixel has been visited by the line tracking algorithm multiple times it is likely to be a vein

Block Diagram

Software Required

MATLAB 2013A

KEIL u VISION (Embedded C)

Hardware Required

PIC Microcontroller

UART Interface Driver

LCD Display

Power supply

Thursday, 28 June 2018

Tumor detection simple technique using Vlsi design

Vlsi projects in chennai

Vlsi based medical image processing for tumor detection

image processing is one of the trending technique which enable us to understand and design fault tolerant, critic analysis system for medical imaging.
detecting the tumor cells, analysing disease factors, morphological analysis,.
even more can be done at high speed FPGA chip through image processing techniques and digital architecture modelling.
steps involved
image preprocessing
input Image is being read from the source like dataset collected from CT scan, mri scan etc those images are resized, converted from rgbtogray,and finally converted to binary or black and white.
the image is background subtracted and blob of cancer cell is detected
high speed process is written in Vhdl behavioral model.
the detected blob is enhanced and volume is calculated
the data is transfered through USB to Ttl converter and transfered to Display system.

Tuesday, 27 March 2018

FPGA based Live image background subtraction

Image Processing In FPGA

FPGA Plays a major role in high speed communication. Image processing becomes vital in any kind of mobile applications. Fault finding, Survelliance, Medical imaging are the applications involves Image processing

Background subtraction process is used to isolate the particular blob of interested region from the real wold camera capture. the purpose of blob seperation is to analyse the roi region movements and tracking and behavioral analysis etc

FPGA based system is realized here to focus on operating speed, resolution area more accurately the digital block process always helpful. Design of Digital filter in FPGA help to clear the noise present in the image
Module Description

PRE PROCESSING
Image preprocessing in MATLAB. Get the image live capture through webCam and initialize the pixel resize work. the array of Pixel values are further processed to RGB to gray conversion.

SERIAL Configuration
The converted Pixel info is transfered through UART Communication.The serially transmitted bits are read in FPGA

BackGround Subtraction
In VLSI Design,The Clock gated logic is developed to hold the each pixel values at rising edge of the clock and subtract with the constant Background value.

An VLSI & MATLAB Fusion work i done here.Related info and diagrams are shown below. contact us for further doubts & clarifications

VLSI SIMULATION

DATA FLOW DIAGRAM

Saturday, 10 March 2018

pwm generation for stepper motor control using FPGA

PWM Generation using FPGA for stepper motor Control

FPGA based stepper motor tuning is developed here. PWM signals are used to tune the rotar and stator of the stepper motor, the duration of pulse determine the tuning step for the motor.

A real time FPGA based system is implemented here in which the PWM signals are generated using the global clock considered here 1 MHZ.

A 8 ms pulse is generated followed by 16ms , 32ms, and 64 ms too.

The design is configurable in a way in which the speed and step size can be varied by the user.

The step size is tunable by an interger value in simulation and Digital sequence of Binary bits assigned as 4 bit Switch in hardware

The speed of the clock also tunable using 2 Bit Switch

Low power clock gated flip flops are used for this design henceforth the design consumes less chip power.

Simulation Result is shown below

Stepper motor Control using FPGA

Architecture Module diagram

Monday, 5 March 2018

GPS based navigation and Audio Commands for Visually Challenged peoples

GPS based navigation and Audio Commands for Visually Challenged peoples

This is one of the interesting idea helpful for visually challenged peoples on navigating them towards correct route. MATLAB tool is used here to get the voice commands and convert them into navigating voice command through MEL Frequency algorithm.

GPS Module is used here to get the location information and an integrated PIC Micro controller is used here to communicate the gps info to MATLAB environment through UART communication. Serial port is configured in such a way it get the location info through GPS also voice command from the person and get the exact required info from the database and proceed the navigation voice commands which is prestored.

The system is locally designed now as a future implementation it can be globalized through IOT platform for real time navigation.

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