Design and
implementation of fault tolerant and fault correcting Spintronic Flip flop
Proposed System
Design of fault tolerant and fault correcting
Spintronic Flip flop is implemented here with active dynamic fault correcting
scheme. The design implies in such a way that it can able to detect as well as
correct the errors occur due to junction tunneling. The internal resistance and
capacitance even though plays a protective block for leakage of current and
voltages, the junction leakages are happens beyond that. The leakage of current
produces power dissipation in the form of heat. The architecture is designed in
such a way it will avoid slow leakage faults 
